Job Post- 1116
Job Type: Full-time
Responsibilities
1. Design from transistor level to different analog blocks of different Analog and Mixed Signal IPs
2. Simulate both schematic and extracted netlist to ensure first-Si success
3. Supervise Analog Layout
Qualifications
1. Solid knowledge on Analog/Mixed-Signal IC Design using state-of-the-art CMOS process down to 40nm using Cadence virtuoso tools. Has clear understanding on mismatch, noise, offset in analog building blocks
2. Knowledge of using Assura or Caliber for extraction and verification of analog circuits on extracted netlist
3. Full depth on semiconductor Device and Modeling of CMOS technology from 180nm down to 40 nm
4. Prior knowledge on design and verification of analog building blocks like low noise and low power amplifier, folded cascode Operational Transconductance amplifier, good understanding and knowledge on design and verification of current mode bandgap for 1.8 to 3.6V application, sub-1V Low voltage low power bandgaps in 0.18um down to 22nm CMOS, Design and verification of 1.8 V voltage regulator (LDO)
Benefits
Compensation and other benefits as per company policy.
Apply using link/QR Code: https://lnkd.in/dv8ZhCiM
Location of Employment: Bangalore, India
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